Welcome back to Josses corner.
Meet Josse, one of our Senior Technical Advisors at Elmatica. This is his corner, where he will share his expertise every month!
After several years in the industry of Printed Circuits, from 1977 to be accurate, I have gathered some extensive experience within the world of design and manufacturing of PCB. No point to sit on this experience myself. The format to share information in 2017, is through a blog, and voila – this is my corner.
This time I will talk about what information is needed to give you a rigid PCB stack up, that you can use when starting routing impedance conductors.
Above fig. illustrates what information is needed to give you a rigid PCB stack up that you can use when starting routing impedance conductors. On above fig. the via span tells us that layer 1,2,5 & 10,9,6 will be cu plated. This is important to know for copper thickness planning.
If you have a dedicated material, or equivalent that must be used it shall be specified. E.g. Panasonic Megtron 6. The fig. is showing where the signal/plane layers are located. If you do not have a way to illustrate the stack up, you can use the table below to complete the needed information.
The above fig. is also showing that the mVias are not stacked at the same x/y position as the buried holes. Then we know that cu overplating of the buried holes is not required.
To keep cost in the low end, you can also ask for manufacturer Standard Stack up for e.g. a 10 layer pcb, and then see if this stack up can be used for you.
Feedback from manufacturer should be as follow:
- Complete stack up, BOM.
- Conductor width to use on the impedance conductors
- Space to use between the impedance conductors (Diff pairs)
- Calculation result
Make your critical conductors visible and easy to find by using a dedicated D-Code for these conductors.
If you decide to route all your conductors with 100 µm, also the one that are impedance conductors, they will not be easy to find. For manufacturer it is useful to see how and where they are located e.g. with ref to copper balancing.
If you slightly change the value on your impedance conductors to 99 or 101µm, these conductors will then end up with a dedicated D-code in Gerber and will be easy to visualize. This will also apply for ODB++ and
IPC-2581 as well.
Physical, just the way it moves:
Generally there are 3 levels of service available for an impedance control printed circuit board.
- No impedance control: The impedance tolerance is loose enough that simply making a design with no extra precautions will result in the correct impedance as long as the design is made correctly within the standard specifications. This is the fastest and least expensive option since it places no extra burden on the PCB manufacturer.
- Impedance calculation: The designer indicates the impedance control conductors. The PCB manufacturer adjusts the (W)width of the conductor and (H)height of the dielectric and gets approval on the proposed specifications before starting manufacturing. A TDR (Time Domain Reflectometry) test can in most cases be performed to confirm the impedance.
- Impedance control: Usually reserved for high-end designs containing either an odd design that does not fit the usual micro strip configuration or a tight tolerance where measuring is required on each produced panel.
Manufacturer will add dedicated test coupons for the required impedances and control measure each
coupon. Also in this case, as in the case with Impedance calculation, the PCB manufacturer adjusts the
(W) width of the conductor and (H) height of the dielectric and gets approval on the proposed specification and changes up front of manufacturing.
Prepreg RC content, conductor widths, copper high, dielectricum high, copper balancing and material
properties can be slightly adjusted to get best possible impedance result.
But, approval shall always take place before manufacturing.
Below are some typical samples on stack ups as results of customer impedance requests.